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U5 Series

The U5 Series features a RISC V Linux-capable application processor that offers high performance with maximum efficiency. The U5 core has a 5-6 stage pipeline and supports virtual memory, enabling 64-bit RISC-V applications.

U5 Series Features

U5 Series allows for instantiation of up to 9 U5 and/or S5 cores

U5 Core Architectural Features

  • RV64GCN capable core with Sv39 Virtual Memory Support
  • Single Issue, in-order 5-6 stage Harvard Pipeline
  • Optional SECDED ECC support on Level 1 and Level 2 memories

Flexible memory system allows for application specific resource partitioning

  • L2 can be split into part cache, part fast addressable RAM

Configurable, coherent, S5X minion cores can provide a variety uses

  • System boot and monitor, Sensor Hub/Fusion, Security Co-Processor

Real Time Capabilities

  • Software enable/disable of dynamic branch prediction
  • Deterministic L1 and L2 Memories
Broad Market Applications

General purpose embedded

Industrial

IoT

High-performance real-time embedded

Automotive

U7 Series

The U7 Series features SiFive’s highest-performance RISC-V Linux-capable application processor. The U7 core has a superscalar 8-stage pipeline with support for virtual memory, enabling the most demanding 64-bit RISC-V applications such as Edge Compute, Big-Data Analytics and 5G Base Stations.

U7 Series Features

U7 allows for instantiation of up to 9 U7 and/or S5 cores as well as a configurable Level 2 Cache

U7 Core Architectural Features

  • RV64GCV capable core with Sv39 Virtual Memory Support
  • Dual Issue, in-order 8 stage Harvard Pipeline
  • Optional SECDED ECC support on Level 1 and Level 2 memories

Performance and Area

  • DMIPS – 2.5 DMIPS/MHz
  • Coremark – 5.1 Coremarks/MHz
  • SPEC – U54 + 40%
  • Core Area is ~30% larger than equivalent U5 Core

Functional Safety and Security and Real Time features

  • SECDED ECC on all L1 and L2 memories
  • User Mode Interrupts for compartmentalization
  • Programmatically clear and/or disable dynamic branch prediction for deterministic execution and enhanced security

Configurable EXX minion cores can provide a variety uses

  • System boot and monitor, Sensor Hub/Fusion, Security Co-Processor
Broad Market Applications

General purpose embedded

Industrial

IoT

High-performance real-time embedded

Automotive

VIU7 Series

The VIU7 Series features high-performance RISC-V Linux-capable application processor. The U7 core has a superscalar 8-stage pipeline with support for virtual memory and latest vector extension instruction set, enabling the most demanding 64-bit RISC-V applications such as Edge Compute, Big-Data Analytics and 5G Base Stations.

VIU7 Series Key Features

Fully-compliant with the RISC-V ISA specification

Up to 8+1 coherent high-performance RISC-V application processors

Supports an in-cluster coherent combination of application processors with real-time processors (U and S cores)

Support vector process module with configurable vector bit width

Low latency composable caches

Application processors with deterministic response

High -performance L1 memory microarchitecture

Physical memory protection

Custom instructions via SCIE for workload- specific customizations

Mixed precision floating point unit capability

Private cache /cache locking capability for mission critical computing

Applications

Enterprise Switching/Routing/Storage, Smart NICs

Edge Analytics, Big-Data Analytics

Autonomous Machines

Edge Compute

5G Infrastructure/Base Stations

AR/VR/MR/XR

U8 Series

The U8 Series features the maximum performance RISC-V Linux-capable application processor. The U8 core has a 3 issue out-of-order superscalar with support for virtual memory. The U8 Series provides unprecedented scalability and is optimized for the highest performance per watt. This makes it ideal for applications such as edge compute, 5G base stations and AR/VR/MR.

U8 Series Key Features

Fully-compliant with the RISC-V ISA specification

Up to 8+1 coherent high-performance RISC-V application processors

Supports an in-cluster coherent combination of application processors with real-time processors (U and S cores)

Low latency composable caches

Application processors with deterministic response

High-performance L1 memory microarchitecture

Physical memory protection

Custom instructions via SCIE for workload-specific customizations

Mixed precision floating point unit capability

Private cache / cache locking capability for mission critical computing

Applications

Enterprise Switching/Routing/Storage, Smart NICs

Edge Analytics, Big-Data Analytics

Autonomous Machines

Edge Compute

5G Infrastructure/Base Stations

AR/VR/MR/XR