SAN MATEO, Calif. - Dec 10, 2019 - SiFive, Inc., the leading provider of commercial RISC-V processor IP and silicon solutions, today announced two new leading-edge products: SiFive Apex for mission-critical processors and SiFive Intelligence processor cores for deep learning markets. Today during a RISC-V Summit keynote, Yunsup Lee, CTO of SiFive and co-inventor of the free and open RISC-V ISA, announced the new high-performance, efficient processor core generators, designed to create an unmatched portfolio of IP for markets that require functional correctness or the ability to process deep learning workloads. Recently, SiFive announced the world’s first RISC-V out-of-order superscalar processor core IP, SiFive U8-Series, and a whole SoC solution for security, SiFive Shield.

New SiFive Apex for Mission-Critical Solutions

The new SiFive Apex line of products employs an innovative new approach to processor core design for mission-critical workloads, based on formally verified core generators. SiFive Apex processor cores are generated using the open-source Kami methodology while retaining the SiFive key principle of parameterized cores configured to the needs of the customer. Using Kami, an open-source high-level parametric methodology for verification, SiFive will introduce a series of clean-sheet new design processor cores based on the RISC-V ISA to address a wide range of efficiency and performance requirements. SiFive Apex technology is designed to enable Size, Weight, and Power (SWaP) optimized cores for mission-critical markets.

SiFive is partnering with ResilTech S.R.L., the leader in resilient computing and functional safety, to support SiFive and its customers to achieve safety compliance at the system or SoC level. More details about SiFive Apex will be presented at the RISC-V Summit in the San Jose Convention Center at 3:40 p.m., Tuesday, Dec. 10, in Grand Ballroom 220-B.

New SiFive Intelligence for Vector Processing Workloads

SiFive Intelligence technology is a series of processor core generators that enable high-performance compute workload support via vector processing. The RISC-V specification enables many extensions to permit the creation of central processing units that are both domain-specific and unified to the target workload needs. Leveraging the RISC-V Vector Extension (RVV), SiFive Intelligence processor cores enable configurable designs for markets from audio, speech or vision processing, to inference processing and machine learning. SiFive showed an average performance uplift of 9X vs traditional scalar processing on RISC-V processing, to demonstrate the benefit of SiFive Intelligence processor cores.

SiFive announced the new Vector Experience Evaluation Program, in which lead customers can evaluate the benefits of SiFive Intelligence processor IP with a comprehensive support package, including software libraries and compiler support.

关于SiFive Intelligence的更多详细信息已在RISC-V峰会上公布，很快可在riscv.org网站上进行查看。

“SiFive has had a tremendous year in 2019, and the introduction of SiFive Apex and SiFive Intelligence is the crowning achievement,” said Dr. Naveed Sherwani, president and CEO of SiFive. “SiFive’s broad suite of foundational technologies positions us well for continued growth and success next year as adoption of RISC-V advances.”

“SiFive has had a tremendous year in 2019, and the introduction of SiFive Apex and SiFive Intelligence is the crowning achievement,” said Dr. Naveed Sherwani, president and CEO of SiFive. “SiFive’s broad suite of foundational technologies positions us well for continued growth and success next year as adoption of RISC-V advances.”

SiFive is a Ruby sponsor of the RISC-V Summit 2019, and is participating in more than a dozen presentations over the three days of the public conference. Attendees can visit the SiFive booth to discover more about the latest IP, products, partnerships, and a chance to meet with the inventors of RISC-V.